Bipul Talukdar, Director of Application Engineering for North America
EEWeb
April 2, 2020
It wasn’t all that long ago when becoming a third-party silicon intellectual property (IP) provider was all the rage in the electronic system design (ESD) community. Engineers with a laptop could sit in their home office or garage, design a functional block of IP, and voila, they were in the IP business.
Times change, and the instant IP provider business has matured to include large global companies, sole proprietors, and everything in between. Third-party silicon IP is plentiful, configurable, and commoditized to support system, processor and peripherals, interface protocols, memory, and analog applications. IP can be packaged in different ways, including soft IP (software), hard IP (physical layout), and even as “chiplets,” individual silicon die that deliver the IP function. The revenue, according to the most recent ESD Alliance Market Statistics Service (MSS) news release, totaled $900.6 million in Q4 2019, a 4% increase compared to Q4 2018. The four-quarter moving average increased 10.1%. This is especially significant given that its early “two engineers in a garage” image has grown to be a worldwide multi-billion-dollar business.
Along the way, what was once believed to be a strictly transactional business is now understood to be a service-oriented business. That also means that one size IP does not fit all system-on-chip (SoC) design groups. Servicing users is an important part of the business model, with many project groups in need of tailored, customized IP. One group, for example, had specific requirements for the IP that it acquired from a third-party vendor that meant removing some of the block’s functionality. It wasn’t an onerous request, but it required the IP provider to have a service model mindset and the willingness to be flexible. For bleeding-edge IP for high-speed applications, the vendor often needs to be part of the chip design group during integration to ensure that the IP will deliver the performance promised.
Savvy chip designers are now more discerning in selecting their third-party IP provider. After all, today’s chips are loaded with third-party and reusable IP building blocks –– in some cases, 100% of the chip –– all in the manner of reducing time-to-market delays. IP integration from different vendors within a company’s own design cannot be correct by construction. Ensuring correct functionality of the final design is a challenge and calls for a partnership with a committed, trustworthy IP vendor who provides on-demand support.
This means researching and careful assessment of appropriate IP providers, all of whom must have a proven track record. Other factors need to be considered, such as how the IP meets the chip designer’s requirements, cost, type of licensing model, verification support, references, and an active evaluation. An active evaluation may mean the vendor’s willingness to customize the existing IP as per a required extension of the specification beyond existing standards and delivery within the evaluation timeframe.
Most important should be a review of the responsiveness of the IP provider’s technical support, service model, documentation, and a test suite if applicable.
The silicon IP business model has evolved over time to where it is now a thriving business and an essential one for chip designers with complexity issues and time-to-market pressures. Choosing the right IP provider can be as critical as the design specification.