SmartDV Ships First Design and Verification IP for MIPI RFFE v3.0 Specification

SmartDV’s LPDDR5 IP Clocks 612 MHz in FPGA Functional Test, 1.6GHz at 28nm

SmartDV Expands Line of Memory Controller Design IP, Strengthening its Already Broad Portfolio of IP Products

SmartDV Offers New Design IP for DDR5 and LPDDR5

SmartDV Adds Support for MIPI I3C 1.1 Across Entire IP Portfolio

SmartDV Achieves Record Revenue in 2019

NSITEXE Selects SmartDV TileLink Verification IP for RISC-V Based Applications

SmartDV’s TileLink, Verilator VIP on Full Display at RISC-V Summit

SmartDV’s Platform-Independent VIP Portfolio Ensures Seamless Coverage-Driven Verificatio Flow