Contact Us
AMBA CHI
Simulation VIP
Overview

SmartDV’s AMBA CHI verification IP provides a solution to verify the functionality of any AMBA CHI-based design. The VIP includes all essential verification components required to completely verify a CHI-based design and is productized with compliance to various verification methodologies, including UVM, SystemVerilog, and SystemC. It helps the user to build a testbench to verify any components in CHI system design—including master, slave, monitor, scoreboard, functional coverage model, and interconnect/NOC/crossbar—at device level and at system level. This VIP has been used successfully by multiple customers across a variety of design projects and includes a complete test suite to test every feature of the ARM AMBA 5 CHI Specification.

Benefits
  • Rich set of configuration parameters to control CHI functionality
  • On-the-fly protocol and data checking, including port level and system level checks
  • Status counters for various events on bus
  • Transaction logging and performance reporting support
  • Faster testbench development and more complete verification of AMBA 5 CHI designs
  • Easy-to-use command interface simplifies testbench control and configuration of master and slave
  • Simplifies results analysis
  • Runs in every major simulation environment
Compliance and Compatibility
  • AMBA 5 CHI-D Specification
  • Backward-compatible with earlier CHI versions