SmartDV’s AMBA AXI verification IP provides a solution to verify functionality of any AMBA AXI design. Proven across many customer production flows, the VIP is productized with compliance to various verification methodologies, including UVM, SystemVerilog, and SystemC. The VIP helps the user build a testbench to verify any components in an AMBA AXI system design—including master, slave, and interconnect/NOC/crossbar—at both device level and system level, serving as a configuarable and customizable verification component to mimic an AXI master or slave.