Contact Us
Overview
SmartDV’s Avalon verification IP provides a solution to verify the Avalon Interface component of an SoC or ASIC. The VIP supports point-to-point connection between two systems, one generating an interrupt and another receiving it. It can help to reduce the number of signals and pin count, and it allows the user to connect individual non-Avalon signals or groups thereof.
Benefits
  • Rich set of configuration parameters to control Avalon interface functionality
  • Status counters for various events on interface
  • Faster testbench development and more complete verification of Avalon interface designs
  • Easy-to-use command interface simplifies testbench control and configuration of master and slave
  • Simplifies results analysis
  • Includes a complete test suite to test every feature of Intel’s Avalon Interface Specification
Compliance and Compatibility
  • Intel Avalon Interface Specification
  • All major simulation environments