Tools & Services – Productivity Tools

Productivity Tools

SmartDV has developed specialized productivity tools to help chip designers incorporate our IP into
their ASICs, SoCs, and FPGAs with greater ease and speed.

SmartVIPDebug

SmartVIPDebug™ provides rapid analysis and debug via advanced industry-standard waveform and tabulated transaction views.

The tool speeds detection of protocol violations and gives the user the ability to troubleshoot without being an expert in a specific protocol.

SmartVIPDebug supports multiple verification environments (simluation, emulation, SystemC) and includes high quality documentation to reduce ramp-up time.

SmartTestBench

SmartTestBench™ automates testbench file generation, eliminating the need for tedious, time-consuming manual creation.

The tool can create testbench files in SystemVerilog, UVM, OVM, and SystemC. It is included with all VIP licenses to help you make the most out of the technology you source from SmartDV.